簡易檢索 / 詳目顯示

研究生: 林煥恩
Huan-En Lin
論文名稱: 低溫沉積薄膜電晶體應用在塑膠基板上之製作與特性之研究
The Fabrication and Characteristics of Low Temperature Deposition Thin Film Transistor Applied for Plastic Substrate
指導教授: 葉鳳生
Feng-Sheng Yeh
張鼎張
Ting-Chang Chang
口試委員:
學位類別: 碩士
Master
系所名稱: 電機資訊學院 - 電子工程研究所
Institute of Electronics Engineering
論文出版年: 2005
畢業學年度: 93
語文別: 英文
論文頁數: 66
中文關鍵詞: 薄膜電晶體塑膠基板
外文關鍵詞: TFT, plastic substract
相關次數: 點閱:2下載:0
分享至:
查詢本校圖書館目錄 查詢臺灣博碩士論文知識加值系統 勘誤回報
  • 近年來平面顯示器被廣泛應用於個項電子產品上。然而目前製造技術大部份仍然以玻璃基板為主。因此使用塑膠基版來取代傳統的玻璃基版將使得顯示器具有質輕,便於攜帶,甚或可曲撓式的特性。
    我們首先研究製程中可能導致塑膠基板劣化的因素,其中包括溫度對塑膠基板的影響,這些影響包括吸附及裂解作用。此外,我們將覆蓋層(hard coating layer)覆蓋於塑膠基板上,可以有效改善溫度對塑膠基板的影響。我們利用電漿輔助化學氣相沉積系統(PECVD)在100OC 沉積大部份的薄膜,其他薄膜則由電子束蒸鍍(Electron beam evaporation)在低於140OC的溫度下沉積。我們分析這些低溫沉積的薄膜而得到較佳化的條件的薄膜,並以這些薄膜在塑膠基板上製作薄膜電晶體。同時,我們發現SiCN薄膜需要有不錯的附著性,並利用調變薄膜厚度,可以達到良好的透光效果。在塑膠基板蓋上SiCN薄膜後明顯會改善製程腔體真空度;此外,我們成功地在100oC環境中,在塑膠基板上製作出以SiON為閘極介電層以及TiO2為覆蓋層的薄膜電晶體。此薄膜電晶體具有104的開關特性以及μ=7E-3 cm2/V.s另外在high-K閘極介電層薄膜的研究,我們也研究了室溫製程的電子束蒸鍍high-K介電層的絕緣特性,應用於電晶體的閘極介電質。並且在矽基板以及玻璃基板上製作出具μ=0.3 cm2/V.s的薄膜電晶體,但由於漏電流太大使得開關特性只有103。同時,儘管我們也在塑膠基板沉積相同結構的薄膜電晶體,由於漏電流的問題,我們無法得到類似的元件特性。


    In last years, the flat panel displays (FDPs) are widely used on amount of electronic produce. However, the current technologies of fabrication still fabricate FDPs with glass substrate mostly. Using plastic substrate substitute for glass substrate makes the FDPs with lightweight, portable and even flexible characteristics.
    First, we investigated the possible degradation of plastic substrate during process due to the temperature impacts on basic plastic substrate characteristics, including absorption and decomposition. Furthermore, the hard coating layer is deposited onto plastic substrate for improving the impacts of temperature. The most thin films are deposited with plasma enhance chemical vapor deposition (PECVD) at 100OC and others are deposited with Electron beam evaporation below 140OC. We had analyzed the characteristics of low temperature deposited thin films to get optimized thin films, which are used to construct TFT on plastic substrate.
    We had found that SiCN film has superior adhesion with plastic substrate, and good transmittance. The vacuum of chamber was promoted after the SiCN coated on plastic substrate. Furthermore, the TFT with SiON gate dielectric and TiO2 hard coating had been fabricated on plastic substrate successfully.
    The on/off ratio is 104 and the mobility μ=7E-3 cm2/V.s of the TFT. Besides, we had also fabricated the TFT using TiO2/SiON as gate dielectric, and the on/off ratio and mobility are 103 and 0.3 cm2/V.s, respectively. Nevertheless, the device characteristic of this TFT on plastic substrate was not observed due to the too high leakage current.

    Contents Abstract (Chinese) ……………………..………………….……i Abstract (English) …………………………………………………iii Acknowledgement…………………………………………………………v Content ………………………………………………………………vi Figure Captions ……………………………………………………viii Table Captions…………………………………………………………xi Chapter.1 Introduction 1.1Introduction…………….……………………..………………1 1.2 Motivation ……………………………………………………2 1.3 Organization of This Thesis……………………………4 Chapter.2 the basic characteristics of the plastic substrate and the hard coating layers 2.1 Introduction………………………………………......5 2.1.1 The mechanism of the PECVD……………………….....7 2.2 The thermal stability of the plastic substrate…………8 2.3 The hard coating layers……………………………..……..10 2.3.1 The function of the additional layers……………… 10 2.3.2 Experiment process………………………………10 2.3.3 The result and discussion…………………………12 2.4 Summary…………………………………………………15 Chapter.3 Characteristics and Analysis of low temperature deposited thin films 3.1 Introduction……………………………….….…….………...16 3.2 Experimental process……..………………..….………..…17 3.3 The characteristics analysis of PECVD deposited low temperature thin films……………………………………….18 3.3.1 PECVD deposited a-Si:H layer……………………...18 3.3.2 PECVD deposited SiON layer….…………….………21 3.4 The characteristics analysis of electron beam evaporation deposited low temperature thin films……………………...22 3.4.1 Electron beam evaporation deposited SiO2………..22 3.4.2 Electron beam evaporation deposited high-K films..23 3.5 Conclusion……………..……………………………….….…24 Chapter. 4 The Fabrication of Thin Film Transistor on Plastic Substrate and Electric Characteristics Analysis 4.1 Introduction……………………………………………….….. 25 4.2 The fabrication process flow of the amorphous thin film transistor……………………………………………..…..…..26 4.3 Measurement of device parameter………………...….……27 4.4 Results and discussion……………………………………..26 4.4.1 The electric characteristics of TFT on Silicon substrate………………………………………...26 4.4.2 The electric characteristics of TFT on plastic substrate with different hard coating layers……………………………...28 4.4.3 The electric characteristics of TFT with different gate dielectric…………….……………………………….29 4.5 Conclusion…………………………..……………………....30 Chapter.5 Conclusion and suggestion for future work 5.1Conclusion……………………………………………….....32 5.2 Suggestions for future work ……………….…………..…33 References…………………………………………………………………………….......34 Figures……………………………………………………………………...39

    Reference
    Chapter 1

    [1] G. N. Parsons, C.-S. Yang, T. M. Klein, and L. Smith, Mater. Res. Soc. Symp. Proc. 507, 19 ~1999!.

    [2] H. Gleskova, S. Wagner, and Z. Suo, Mater. Res. Soc. Symp. Proc. 508, 73 ~1998!.

    [3] D. B. Thomasson, M. Bonse, R. J. Koval, J. R. Huang, C. R. Wronski, and T. N. Jackson, 56th Annual Device Research Conference Digest, June1998, p. 126.

    [4] ‘Y. Tanaka, M. Shibusawa, M. Dohjo, 0. ‘Ibmita, S. Uchikoga, and H. Yamanaka, SID International Syniposium Digest of Technical Papers(SID, Boston, 1992), Vol. 23.

    [5] K. Suzuki, in Amorphous and Microcrystalline Semicomiuctor Devices: Optoelectronic Devices, edited by J. Kanicki (Artech House, Boston,1991).

    [6] C.C. Wu et al, IEEE Electron Device Letters, 18, 609 (1997).

    Chapter 2

    [1] T.D. Moustakas, D.A. Anderson, W. Paul, Solid State Commun. 23. (1977) 155.
    [2] M. Kitigawa, K. Setsune, Y. Marabe. T. Hirao, Jpn. J. Appl. Phys. 27 (1988)2026.
    [3] G.N. Parsons, C. Wang, M.J. Williams, G. Lucovsky, Appl. Phys. Lett. 56. (1990)1895.
    [4] Y. Hishikawa, S. Tsuge, N. Nakamura, S. Tsuda, S. Nakano, Y. Kuwano, J. Appl. Phys. 69 (1991) 508.
    [5] J.P. Conde, K.K. Chan, J.M. Blum, J.J. Cuomo, J.Appl. Phys. 71. (1992) 3981.
    [6] A. Suzuki, G. Ganguly, A. Matsuda, Appl. Phys. Lett. 63 (1993) 2806.
    [7] J.P. Conde, K.K. Chan, J.M. Blum, M. Arienzo, P.A. Monteiro, J.A. Ferreira,
    V. Chu, N. Wyrsh, J. Appl. Phys. 73 (1993) 1826.
    [8] T. Kamei, G. Ganguly, N. Hata, A. Matsuda, J. Non- Cryst. Solids.164-166 (1993) 43.
    [9] M.K. Cheung, M.A. Petrich, J. Appl. Phys. 73 (1993) 3237.
    [10] G. Ganguly, A. Matsuda, Phys. Rev. B 47 (1993) 3661.
    [11] P. Roca i Cabarrocas, Appl. Phys. Lett. 65 (1994) 1674.
    [12] M. Goto, H. Toyoda, M. Kitagawa, T. Hirao, H. Sugai, Jpn. J. Appl. Phys.
    Part 2-Lett. 35 (1996) L1009.
    [13] E. Srinivasan, D.A. Lloyd, G.N. Parsons, J. Vacuu1 Sci. Technol. A 15 (1997) 77.
    [14] M.B. Schubert, Thin Solid Films 337 (1999) 240.
    [15] O.S. Panwar, C. Mukherjee, R. Bhattacharyya, Solar Energy Mater. Solar Cells 57 (1993) 373.
    [16] S.He,H. Nishiki, J. Hartzell,andY.Nakata SID 00 DIGEST, pp.278-281 (2000).
    [17]H.Gleskova, S. Wagner,Z.suo, J. Non-Cryst. Solids266-269, pp.1320-1324(2000).
    [18]S. Po;ach, D. Horst, G. Maier, T. Kallfass, and E. Lueder, SPIE, vol. 3649, pp. 31-39, 1999.

    Chapter 3
    [1]A. Sazonov, A. Nathan, and D. Striakhilev, “ Materials optimization for thin film transistors fabricated at low temperature on plastic substrate,” Journal of Non-Crys-talline Solids, vol. 266-269, pp. 1329-1334, 2000.
    [2]G. N. parsons, J. Non-cryst. Solids, “Surface reactions in a very-low-temperature hydrogenated amorphous silicon deposition, and application to thin film transistor,” vol. 266-269, pp. 23-32, 2000.
    [3]S. M. Gates, “Prospects for active matrix displays on plastic,” Mat. Res. Soc. Symp. Proc., vol. 467, pp. 843-849, 1997.
    [4] W.-S. Hong, J.S. Drewery, T. Jing, S.N. Kaplan, V. Perez-Mendez, Jpn. J. Appl. Phys. 34 (1995) 3012.

    Chapter 4

    [1] A. Sazonov, and A. Nathan, J.Vac.Sci.Technol.A, 18, 780(2000).

    [2] J. W. Tsai, C. Y. Huang, Y. H. Tai, and H. C. Cheng, “Reducing threshold voltage shifts in amorphous silicon thin film transistors by hydrogenating the gate nitride prior to amorphous silicon deposition,” Appl. Phys. Lett., vol. 71, pp. 1237–1239, 1997.

    [3] Byung Cheon Lim, Young Jin Choi, Jong Hyun Choi, and Jin Jang,IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 47, NO. 2, FEBRUARY 2000, p.367

    [4] H. Uchida, K. Takechi, S. Nishida, and S. Kaneko, “High-mobility and
    high-stability a-Si:H thin film transistors with smooth SiN /a-Si interface,”

    [5] A. Nathan, R.V.R. Murthy, S.G. Chamberlain, Technical Digest of Ninth Canadian Semiconductor Technology Conference, Ottawa, August 1999, p. 143.

    無法下載圖示 全文公開日期 本全文未授權公開 (校內網路)
    全文公開日期 本全文未授權公開 (校外網路)

    QR CODE